Difference between revisions of "Assembly Language"
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This instruction is to load a value stored in memory into a CPU register. | This instruction is to load a value stored in memory into a CPU register. | ||
| − | LDR Rd, <memory ref> | + | LDR Rd, <memory ref> |
===STR - Store=== | ===STR - Store=== | ||
This instruction is to store a value from Register d into Memory location <memory ref>. | This instruction is to store a value from Register d into Memory location <memory ref>. | ||
| − | STR Rd, <memory ref> | + | STR Rd, <memory ref> |
===ADD - Add=== | ===ADD - Add=== | ||
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The output is stored in Register d | The output is stored in Register d | ||
| − | ADD Rd, Rn, <operand> | + | ADD Rd, Rn, <operand> |
===SUB - Subtract=== | ===SUB - Subtract=== | ||
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The output is stored in Register d | The output is stored in Register d | ||
| − | SUB Rd, Rn, <operand> | + | SUB Rd, Rn, <operand> |
===MOV - Move=== | ===MOV - Move=== | ||
This instruction is to copy a value into a register. The value from the operand is stored in Register d | This instruction is to copy a value into a register. The value from the operand is stored in Register d | ||
| − | MOV Rd, <operand> | + | MOV Rd, <operand> |
===CMP - Compare=== | ===CMP - Compare=== | ||
The CMP instruction compares two operands. It is generally used in conditional execution and is needed if you wish to do a conditional branch. It compares the operand with the Register n. | The CMP instruction compares two operands. It is generally used in conditional execution and is needed if you wish to do a conditional branch. It compares the operand with the Register n. | ||
| − | CMP Rn, <operand> | + | CMP Rn, <operand> |
===B - Branch=== | ===B - Branch=== | ||
This will always branch to the instruction at position <label> in the program. | This will always branch to the instruction at position <label> in the program. | ||
| − | B <label> | + | B <label> |
===BEQ - Branch If Equal=== | ===BEQ - Branch If Equal=== | ||
This must follow a CMP, and if the CMP values are equal this OpCode will branch to the specified <label> | This must follow a CMP, and if the CMP values are equal this OpCode will branch to the specified <label> | ||
| − | BEQ <label> | + | BEQ <label> |
===BNE - Branch If Not Equal=== | ===BNE - Branch If Not Equal=== | ||
This must follow a CMP, and if the CMP values are not equal this OpCode will branch to the specified <label> | This must follow a CMP, and if the CMP values are not equal this OpCode will branch to the specified <label> | ||
| − | BNE <label> | + | BNE <label> |
===BGT - Branch If Greater Than=== | ===BGT - Branch If Greater Than=== | ||
This must follow a CMP, and if the CMP values are Greater Than this OpCode will branch to the specified <label> | This must follow a CMP, and if the CMP values are Greater Than this OpCode will branch to the specified <label> | ||
| − | BGT <label> | + | BGT <label> |
===BLT - Branch If Less Than=== | ===BLT - Branch If Less Than=== | ||
This must follow a CMP, and if the CMP values are Less Than this OpCode will branch to the specified <label> | This must follow a CMP, and if the CMP values are Less Than this OpCode will branch to the specified <label> | ||
| − | BLT <label> | + | BLT <label> |
===AND - Bitwise And=== | ===AND - Bitwise And=== | ||
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The result is stored in Register d | The result is stored in Register d | ||
| − | AND Rd, Rn, <operand> | + | AND Rd, Rn, <operand> |
===ORR - Bitwise Or=== | ===ORR - Bitwise Or=== | ||
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The result is stored in Register d | The result is stored in Register d | ||
| − | ORR Rd, Rn, <operand> | + | ORR Rd, Rn, <operand> |
===EOR - Bitwise Xor=== | ===EOR - Bitwise Xor=== | ||
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The result is stored in Register d | The result is stored in Register d | ||
| − | EOR Rd, Rn, <operand> | + | EOR Rd, Rn, <operand> |
===MVN - Bitwise Not=== | ===MVN - Bitwise Not=== | ||
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The result is stored in Register d | The result is stored in Register d | ||
| − | MVN Rd, <operand> | + | MVN Rd, <operand> |
===LSL - Logical Shift Left=== | ===LSL - Logical Shift Left=== | ||
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The result is stored in Register d | The result is stored in Register d | ||
| − | LSL Rd, Rn, <operand> | + | LSL Rd, Rn, <operand> |
===LSR - Logical Shift Right=== | ===LSR - Logical Shift Right=== | ||
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The result is stored in Register d | The result is stored in Register d | ||
| − | LSR Rd, Rn, <operand> | + | LSR Rd, Rn, <operand> |
===HLT - Halt Program=== | ===HLT - Halt Program=== | ||
Causes the processor to stop executing your program. | Causes the processor to stop executing your program. | ||
| − | HLT | + | HLT |
Revision as of 10:08, 16 June 2017
Contents
- 1 Operands
- 2 Op Codes
- 2.1 LDR - Load
- 2.2 STR - Store
- 2.3 ADD - Add
- 2.4 SUB - Subtract
- 2.5 MOV - Move
- 2.6 CMP - Compare
- 2.7 B - Branch
- 2.8 BEQ - Branch If Equal
- 2.9 BNE - Branch If Not Equal
- 2.10 BGT - Branch If Greater Than
- 2.11 BLT - Branch If Less Than
- 2.12 AND - Bitwise And
- 2.13 ORR - Bitwise Or
- 2.14 EOR - Bitwise Xor
- 2.15 MVN - Bitwise Not
- 2.16 LSL - Logical Shift Left
- 2.17 LSR - Logical Shift Right
- 2.18 HLT - Halt Program
Operands
The operand can be interpreted in two different ways, if it uses:
- # it refers to a specific value to use
- Rm uses the value stored in register m
Op Codes
Below is a list of the OpCodes used within your examinations. This table will always be given to you with a small explanation and syntax for each command.
LDR - Load
This instruction is to load a value stored in memory into a CPU register.
LDR Rd, <memory ref>
STR - Store
This instruction is to store a value from Register d into Memory location <memory ref>.
STR Rd, <memory ref>
ADD - Add
Operation used to add two numbers together, the value in the operand to the value in Register n.
The output is stored in Register d
ADD Rd, Rn, <operand>
SUB - Subtract
operation used to subtract two numbers from each other, the value in the operand from the value in Register n.
The output is stored in Register d
SUB Rd, Rn, <operand>
MOV - Move
This instruction is to copy a value into a register. The value from the operand is stored in Register d
MOV Rd, <operand>
CMP - Compare
The CMP instruction compares two operands. It is generally used in conditional execution and is needed if you wish to do a conditional branch. It compares the operand with the Register n.
CMP Rn, <operand>
B - Branch
This will always branch to the instruction at position <label> in the program.
B <label>
BEQ - Branch If Equal
This must follow a CMP, and if the CMP values are equal this OpCode will branch to the specified <label>
BEQ <label>
BNE - Branch If Not Equal
This must follow a CMP, and if the CMP values are not equal this OpCode will branch to the specified <label>
BNE <label>
BGT - Branch If Greater Than
This must follow a CMP, and if the CMP values are Greater Than this OpCode will branch to the specified <label>
BGT <label>
BLT - Branch If Less Than
This must follow a CMP, and if the CMP values are Less Than this OpCode will branch to the specified <label>
BLT <label>
AND - Bitwise And
This OpCode will perform a bitwise logical AND between the values in Register n and the <operand>.
This will compare both inputs, it will output a 1 for each bit when both inputs are a 1. All other outputs will be a 0
The result is stored in Register d
AND Rd, Rn, <operand>
ORR - Bitwise Or
This OpCode will perform a bitwise logical OR between the values in Register n and the <operand>.
This will compare both inputs, it will output a 1 for each bit when either inputs are a 1. All other outputs will be a 0
The result is stored in Register d
ORR Rd, Rn, <operand>
EOR - Bitwise Xor
This OpCode will perform a bitwise logical XOR between the values in Register n and the <operand>.
This will compare both inputs, it will output a 1 for each bit when either but not both inputs are a 1. All other outputs will be a 0
The result is stored in Register d
EOR Rd, Rn, <operand>
MVN - Bitwise Not
This OpCode will perform a bitwise logical NOT between the value in the <operand>.
This will negate the input by swapping all 1's for 0's, and 0's for 1's
The result is stored in Register d
MVN Rd, <operand>
LSL - Logical Shift Left
Logically shift left the value stored in Register n by the number of bits specified by the <operand>.
The result is stored in Register d
LSL Rd, Rn, <operand>
LSR - Logical Shift Right
Logically shift right the value stored in Register n by the number of bits specified by the <operand>.
The result is stored in Register d
LSR Rd, Rn, <operand>
HLT - Halt Program
Causes the processor to stop executing your program.
HLT
